d2_3aoffset_phase_lock_servo

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Files in ffc:locking_electronics

back_panel_markup.png
992×293
2022/09/26 23:46
393.1 KB
ethernet.png
292×204
2022/09/20 22:27
38.4 KB
fceo_1_cropped.png
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2022/09/27 20:07
147.4 KB
fceo_2_centered.png
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2022/09/27 20:07
143.1 KB
fceo_3_locked.png
1268×1067
2022/09/27 20:07
140.4 KB
fopt_1_no-lock.png
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2022/09/27 20:07
156.7 KB
fopt_2_locked.png
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2022/09/27 20:07
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fpga_xml_import.png
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2023/08/08 23:18
57.5 KB
fpgaii_front_pic.jpg
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2023/06/09 00:30
613.3 KB
front_panel_markup.png
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2022/09/26 23:46
401.7 KB
picture2.png
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2022/09/20 22:27
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picture3.png
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2022/09/20 22:27
60.6 KB
red_pitaya_locked_comb_schematic.png
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2022/09/20 22:23
151.9 KB
rpm-100_stage_photo.jpg
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2022/09/26 23:26
94.5 KB
settings_marked.png
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2022/09/20 22:39
188.2 KB
settings.png
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2022/09/27 20:07
75.9 KB
slice-fpga-ii_front_panel.png
600×179
2023/05/03 16:50
122.4 KB
slice-fpga-ii-rear.png
600×177
2023/05/03 17:52
141.4 KB
start_window_marked.png
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2022/09/20 22:41
56.6 KB
updated_centering_fceo.png
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2023/06/09 21:19
1.8 MB
updated_centering_fopt.png
2469×1936
2023/06/09 21:24
1.6 MB
updated_locking_fceo.png
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2023/06/09 21:19
1.7 MB
updated_locking_fopt.png
2520×2069
2023/06/09 21:24
1.7 MB
winpython_terminal.png
633×263
2023/06/09 18:09
32.9 KB

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